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A study on neutral-point voltage control of three-level T-type inverter

초록/요약

Three-level inverters are becoming increasingly popular because of their advantages over a conventional two-level inverters. For example, their output ac voltage provides lower dv/dt values and reduced total harmonic distortion (THD). In addition, switching devices are operated at low voltage stress. Therefore, three-level inverter has been widely used in distributed renewable energy systems and in medium voltage high-power industrial applications. In the past, a NPC inverter was the most widely used inverter. But in recent years, the three-level T-type inverter is preferred because of its minimized conduction losses by reducing the switch modules on the current paths. Inherently, the three-level NPC and T-NPC inverter have two split dc-link capacitors connected in series. This can lead to an unbalanced neutral-point (NP) voltage, which causes increased voltage stress on switching devices. It also increase the THD of the output current because a low-order harmonic will appear in the output voltage. To maximize the performance of the three-level inverter system and to achieve a balanced NP voltage, the voltages of series connected dc-link capacitors should be equal. The three-level inverter has 27 combinations of switching states. It is possible to represent a switching state with a space voltage vector. Based on their magnitude, the space voltage vectors can be divided into four groups: zero, small, medium, and large-vector. The switching states of the large- and zero-voltage vectors do not affect the NP voltage. But if the inverter is operated with small- and medium-voltage vectors, the NP voltage varies according to the direction of phase current connected in the NP. A new SVM strategy can balance the NP voltage easily by modulating the P-type and Ntype small switching state. The switch ON time is modulated depending on compensation time calculated from NP current during a switching period. Experimental results for 3-phase three-level T-NPC inverter show the feasibility of the proposed control.

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목차

I. Introduction
II. Preliminaries
2.1 Three-level inverter
2.2 Space vector modulation
2.3 Effect of switching states on NP voltage deviation
2.4 Conventional method for NP voltage balancing problem
III. Proposed Control Method
3.1 SVM
3.2 Balancing of the NP voltage
IV. Experimental Results
V. Conclusion

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