A distributed current stimulator ASIC for high density neural stimulation
- 등재 SCOPUS
- 발행기관 Institute of Electrical and Electronics Engineers Inc.
- 발행년도 2016
- 총서유형 Journal
- 회의명 38th Annual International Conference of the IEEE Engineering in Medicine and Biology Society, EMBC 2016
- 일자 16 August 2016 through 20 August 2016
- URI http://www.dcollection.net/handler/ewha/000000141796
- ISBN 9781457702204
- 본문언어 영어
- Published As http://dx.doi.org/10.1109/EMBC.2016.7591060
초록/요약
This paper presents a novel distributed neural stimulator scheme. Instead of a single stimulator ASIC in the package, multiple ASICs are embedded at each electrode site for stimulation with a high density electrode array. This distributed architecture enables the simplification of wiring between electrodes and stimulator ASIC that otherwise could become too complex as the number of electrode increases. The individual ASIC chip is designed to have a shared data bus that independently controls multiple stimulating channels. Therefore, the number of metal lines is determined by the distributed ASICs, not by the channel number. The function of current steering is also implemented within each ASIC in order to increase the effective number of channels via pseudo channel stimulation. Therefore, the chip area can be used more efficiently. The designed chip was fabricated with area of 0.3 mm2 using 0.18 μm BCDMOS process, and the bench-top test was also conducted to validate chip performance. © 2016 IEEE.
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