High-Speed Visual Target Identification for Low-Cost Wearable Brain-Computer Interfaces
- 주제(키워드) Brain-computer interface (BCI) , canonical correlation analysis (CCA) , electroencephalogram (EEG) , steady-state visual evoked potential (SSVEP) , target identification
- 주제(기타) Computer Science, Information Systems; Engineering, Electrical & Electronic; Telecommunications
- 설명문(일반) [Kim, Dokyun] Seoul Natl Univ Sci & Technol, Dept Elect Informat Engn, Seoul 01811, South Korea; [Byun, Wooseok] Chungnam Natl Univ, Dept Elect Engn, Daejeon 34134, South Korea; [Ku, Yunseo] Chungnam Natl Univ, Coll Med, Dept Biomed Engn, Daejeon 34134, South Korea; [Kim, Ji-Hoon] Ewha Womans Univ, Dept Elect & Elect Engn, Seoul 01811, South Korea
- 등재 SCIE, SCOPUS
- OA유형 gold
- 발행기관 IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
- 발행년도 2019
- URI http://www.dcollection.net/handler/ewha/000000160543
- 본문언어 영어
- Published As http://dx.doi.org/10.1109/ACCESS.2019.2912997
초록/요약
Non-invasive brain-computer interfaces (BCI) have received a great deal of attention due to recent advances in signal processing. Two types of electroencephalograms (EEG), P300 and steady-state visual evoked potential (SSVEP), have been widely used to enable paralyzed patients to communicate with others. Although there have been many signal processing algorithms focusing on target identification accuracies such as power spectral density analysis (PSDA) and canonical correlation analysis (CCA), their high computational complexity drives up the cost of such systems. In the proposed lightweight target identification algorithm, we have focused on developing an improved information transfer rate (ITR) for high-quality communication and reducing overall implementation cost. The proposed algorithm, CCA-Lite, includes two algorithmic optimizations-signal binarization and on-the-fly covariance matrix calculation- which have enabled the development of a low-cost, single-channel, and wearable BCI system using SSVEP. The prototypical BCI system makes use of an ARM Cortex-M3-based low-cost microcontroller unit (MCU), which has been built for 1.5s SSVEP recordings. Compared to the state-of-the-art CCA-based target identification algorithm, CCA-Lite exhibits 25% better ITR and has reduced memory requirements by 92% and single-target identification cycle time by 26%.
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