Analysis of the Sensing Margin of Silicon and Poly-Si 1T-DRAM
- 주제(키워드) one-transistor dynamic random-access memory (1T-DRAM) , polysilicon , grain boundary , electron trapping
- 주제(기타) Nanoscience & Nanotechnology
- 주제(기타) Instruments & Instrumentation
- 설명문(일반) [Kim, Hyeonjeong; Yoo, Songyi; Sun, Wookyung; Shin, Hyungsoon] Ewha Womans Univ, Dept Elect & Elect Engn, Seoul 03760, South Korea; [Kang, In-Man] Kyungpook Natl Univ, Sch Elect Engn, Daegu 702701, South Korea; [Cho, Seongjae] Gachon Univ, Dept Elect Engn, Gyeonggi Do 461701, South Korea
- 등재 SCIE, SCOPUS
- OA유형 Green Published, gold
- 발행기관 MDPI
- 발행년도 2020
- 총서유형 Journal
- URI http://www.dcollection.net/handler/ewha/000000169424
- 본문언어 영어
- Published As https://dx.doi.org/10.3390/mi11020228
- PubMed https://pubmed.ncbi.nlm.nih.gov/32102235
초록/요약
Recently, one-transistor dynamic random-access memory (1T-DRAM) cells having a polysilicon body (poly-Si 1T-DRAM) have attracted attention as candidates to replace conventional one-transistor one-capacitor dynamic random-access memory (1T-1C DRAM). Poly-Si 1T-DRAM enables the cost-effective implementation of a silicon-on-insulator (SOI) structure and a three-dimensional (3D) stacked architecture for increasing integration density. However, studies on the transient characteristics of poly-Si 1T-DRAM are still lacking. In this paper, with TCAD simulation, we examine the differences between the memory mechanisms in poly-Si and silicon body 1T-DRAM. A silicon 1T-DRAM cell's data state is determined by the number of holes stored in a floating body (FB), while a poly-Si 1T-DRAM cell's state depends on the number of electrons trapped in its grain boundary (GB). This means that a poly-Si 1T-DRAM can perform memory operations by using GB as a storage region in thin body devices with a small FB area.
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