REACT: Scalable and High-Performance Regular Expression Pattern Matching Accelerator for In-Storage Processing
- 주제(키워드) In-storage processing (ISP) , regular expression matching , accelerator , solid-state drive
- 주제(기타) Computer Science, Theory & Methods
- 주제(기타) Engineering, Electrical & Electronic
- 설명문(일반) [Jeong, Won Seob; Lee, Changmin; Kim, Keunsoo; Yoon, Myung Kuk; Jeon, Won; Ro, Won Woo] Yonsei Univ, Sch Elect & Elect Engn, Seoul 120749, South Korea; [Jung, Myoungsoo] Korea Adv Inst Sci & Technol, Sch Elect Eng, Daejeon 34141, South Korea
- 관리정보기술 faculty
- 등재 SCIE, SCOPUS
- 발행기관 IEEE COMPUTER SOC
- 발행년도 2020
- 총서유형 Journal
- URI http://www.dcollection.net/handler/ewha/000000182476
- 본문언어 영어
- Published As http://dx.doi.org/10.1109/TPDS.2019.2953646
초록/요약
This article proposes REACT, a regular expression matching accelerator, which can be embedded in a modern Solid-State Drive (SSD) and a novel data access scheduling algorithm for high matching throughput. Specifically, REACT, including our data access scheduling algorithm, increases the utilization of SSD and the degree of internal memory parallelism for pattern matching processes. While the low-level flash exhibits long latency, modern SSDs in practice achieve high I/O performance by utilizing the massive internal parallelism at the system-level. However, exploiting the parallelism is limited for pattern matching since the sub-blocks, which constitute an input data and can be placed in multiple flash pages, should be tested in a sequence to process the input correctly. This limitation can induce low utilization of the accelerator. To address this challenge, the proposed REACT simultaneously processes multiple input streams with a parallel processing architecture to maximize matching throughput by hiding the long and irregular latency. The scheduling algorithm finds a data stream which requires a sub-block in closest time and prioritizes the access request to reduce the data stall of REACT. REACT achieves maximum 22.6 percent of matching throughput improvement on a 16-channel high-performance SSD compared to the accelerator without the proposed scheduling algorithm.
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