A CMOS Integrator-Based Clock-Free Time-to-Digital Converter for Home-Monitoring LiDAR Sensors
- 주제(키워드) CMOS , integrator , LiDAR , PDH , sensor , TDC
- 주제(기타) Chemistry, Analytical
- 주제(기타) Engineering, Electrical & Electronic
- 주제(기타) Instruments & Instrumentation
- 설명문(일반) [He, Ying; Park, Sung Min] Ewha Womans Univ, Dept Elect & Elect Engn, Seoul 03760, South Korea; [Park, Sung Min] Ewha Womans Univ, Grad Program Smart Factory, Seoul 03760, South Korea
- 등재 SCIE, SCOPUS
- OA유형 Green Published, gold
- 발행기관 MDPI
- 발행년도 2022
- 총서유형 Journal
- URI http://www.dcollection.net/handler/ewha/000000191038
- 본문언어 영어
- Published As https://doi.org/10.3390/s22020554
- PubMed https://pubmed.ncbi.nlm.nih.gov/35062516
초록/요약
This paper presents a nine-bit integrator-based time-to-digital converter (I-TDC) realized in a 180 nm CMOS technology for the applications of indoor home-monitoring light detection and ranging (LiDAR) sensors. The proposed I-TDC exploits a clock-free configuration so as to discard clock-related dynamic power consumption and some notorious issues such as skew, glitch, and synchronization. It consists of a one-dimensional (1D) flash TDC to generate coarse-control codes and an integrator with a peak detection and hold (PDH) circuit to produce fine-control codes. A thermometer-to-binary converter is added to the 1D flash TDC, yielding four-bit coarse codes so that the measured detection range can be represented by nine-bit digital codes in total. Test chips of the proposed I-TDC demonstrate the measured results of the 53 dB dynamic range, i.e., the maximum detection range of 33.6 m and the minimum range of 7.5 cm. The chip core occupies the area of 0.14 x 1.4 mm(2), with the power dissipation of 1.6 mW from a single 1.2-V supply.
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